32 Bits of Pure Power

While the Amiga was dominating the late 80s with its custom chips, the PC was often seen as a “boring” business machine. That changed with the widespread adoption of the Intel 80386 (i386). It was the first x86 processor to feature a 32-bit architecture, and it single-handedly laid the foundation for high-performance PC demoscene coding.

The Historical Context

When the 80386 launched in October 1985, it represented a quantum leap in personal computing. Intel’s engineers, led by John Crawford, designed a chip with 275,000 transistors—more than ten times the count of the 80286. The chip was manufactured using a 1.5-micron process technology and initially ran at 16 MHz, though later versions would reach 40 MHz.

The 386 wasn’t just an incremental improvement; it was a fundamental rethinking of the x86 architecture. Intel recognized that the segmented memory model of the 8086 family, while clever for its time, had become a straightjacket preventing serious software development.

Breaking the 640KB Barrier

The previous 8086 and 80286 processors used a “Segmented Memory” model, where developers had to juggle 64KB memory segments through complex pointer math. This created what became known as the “640KB barrier”—the infamous limitation that Bill Gates allegedly called “enough for anybody” (though he later denied saying this).

The problem wasn’t just the 640KB limit itself. It was the mental overhead of constantly thinking about near pointers, far pointers, huge pointers, and the nightmare of segment arithmetic. Code like this was common:

/* Nightmare segment arithmetic on 8086/286 */
unsigned char far *ptr = MK_FP(segment, offset);
/* Crossing a segment boundary required recalculating */

The 386 introduced Protected Mode and Paging, allowing for:

4 Gigabytes of Linear Address Space: No more segments. A programmer could treat the entire RAM as one continuous array.
General Purpose 32-bit Registers: EAX, EBX, ECX, EDX, ESI, EDI, EBP, and ESP allowed for much faster math and complex coordinate transformations.
Hardware Memory Protection: The CPU could prevent programs from accessing each other’s memory, enabling true multitasking.

The Register Revolution

The expansion from 16-bit to 32-bit registers was transformative. Consider a simple pixel coordinate calculation:

; 16-bit (286): Required multiple instructions and could overflow
mov ax, [y_coord]
mov bx, 320
mul bx
add ax, [x_coord]
; Result limited to 65,535

; 32-bit (386): Simple and fast
mov eax, [y_coord]
imul eax, 320
add eax, [x_coord]
; Result can be up to 4 billion

Why it Mattered for Graphics

Effects like the Rotozoomer or Voxel Space require thousands of calculations per frame. On a 16-bit 286, these were painfully slow. The 386 could process 32-bit fixed-point math in a single clock cycle, making real-time texture mapping and 3D projection a reality on the PC.

The demoscene quickly discovered that fixed-point arithmetic (using integers to represent fractional numbers) was the key to fast graphics. A common technique was 16.16 fixed-point, where the upper 16 bits represented the integer part and the lower 16 bits the fractional part. The 386’s 32-bit registers made this elegant and efficient.

The Virtual 8086 Mode

A key feature of the 386 was its ability to run multiple “Virtual 8086” tasks. This allowed developers to create “DOS Extenders” (like PMODE/W, DOS/4GW, or CWSDPMI). These extenders let demoscene coders write 32-bit “flat model” code while still having access to BIOS interrupts and the standard VGA hardware.

The DOS Extender Ecosystem

The rise of DOS extenders created a fascinating ecosystem:

DOS/4GW: Bundled with Watcom C/C++, this became the de facto standard. Games like Doom, Descent, and Command & Conquer all shipped with it.
PMODE/W: A free alternative popular in the demoscene. Its small footprint (about 8KB) made it perfect for size-limited productions.
CWSDPMI: The DJGPP project’s extender, enabling GCC on DOS.

The key innovation was the DPMI (DOS Protected Mode Interface) specification. This standard allowed protected-mode programs to request services from the underlying DOS kernel, bridging the old 16-bit world with the new 32-bit reality.

Technical Deep Dive: The Memory Management Unit

The 386’s MMU (Memory Management Unit) introduced a two-level page table system:

Page Directory: 1024 entries, each pointing to a Page Table
Page Tables: Each containing 1024 entries pointing to 4KB physical pages

This system enabled features that modern programmers take for granted:

Demand Paging: Loading code and data only when needed
Copy-on-Write: Efficient process forking
Memory-Mapped Files: Treating disk files as memory arrays

For demoscene coders, the most important feature was the ability to map video memory (at physical address 0xA0000) directly into their linear address space, eliminating the segment register juggling that plagued earlier code.

The 386SX: Democratizing 32-bit Computing

In 1988, Intel released the 80386SX—a cost-reduced version with a 16-bit external bus. While this made memory access slower, it allowed 386 motherboards to use cheaper 16-bit memory chips. This brought 32-bit computing to the masses and rapidly expanded the market for 386-optimized software.

The demoscene was quick to optimize for both variants. Productions would often include both a “386SX” version with reduced effects and a “386DX” version that pushed the hardware to its limits.

Programming Techniques and Optimizations

Demoscene coders developed numerous techniques specific to the 386:

The LEA Trick

The LEA (Load Effective Address) instruction could perform complex arithmetic in a single cycle:

; Calculate EAX = EBX * 5 in one instruction
lea eax, [ebx + ebx*4]

; Calculate EAX = EBX * 9 + 7 in one instruction
lea eax, [ebx + ebx*8 + 7]

Unrolled Loops

The 386’s instruction cache was small (16 bytes pre-fetch queue), so loop unrolling traded code size for speed:

; Copy 320 bytes, 4 at a time, fully unrolled
mov eax, [esi]      ; Pixel 0-3
mov [edi], eax
mov eax, [esi+4]    ; Pixel 4-7
mov [edi+4], eax
; ... repeated 80 times

Self-Modifying Code

The 386’s flat memory model made self-modifying code practical:

; Modify an immediate value in the instruction stream
mov byte ptr [color_patch+1], al
color_patch:
mov byte ptr [edi], 0   ; The 0 gets patched

Legacy

The i386 ISA (Instruction Set Architecture) was so robust that it remained the standard for decades. Even today’s 64-bit Intel and AMD processors still boot up in a mode that is essentially an ultra-fast 80386. The “Real Mode” initialization sequence that every x86 processor performs is a direct descendant of 8086 compatibility, but Protected Mode—the 386’s gift to computing—remains the foundation of every modern operating system.

The 386 transformed the PC from a business machine into a creative platform. It gave demoscene coders the tools they needed to compete with and eventually surpass the Amiga. Without the 386’s linear memory model and 32-bit registers, classics like Second Reality and Unreal would have been impossible.

The Competitive Landscape

It’s worth noting what the 386 was competing against:

Motorola 68020/030: Used in high-end Amigas and Macs, these were elegant but expensive
SPARC and MIPS: Workstation processors that cost thousands of dollars
ARM2: The Acorn Archimedes used this, but it never gained traction outside the UK

The 386’s combination of performance, price, and backward compatibility made it the winner of the 32-bit wars—and set the stage for Intel’s dominance in the decades to come.

Source & Further Reading

Intel 80386 Programmer’s Reference Manual (1986): The definitive guide to the architecture.
“The 386: The CPU That Changed Everything”: A retrospective by PC Magazine.
Michael Abrash’s Graphics Programming Black Book: Deep-dives into 386 assembly optimization for graphics. External Link
“Protected Mode Software Architecture” by Tom Shanley: Understanding the 386’s memory protection system.
The DJGPP FAQ: A treasure trove of 386 programming knowledge from the DOS era.